In the prior art, a nonvolatile memory device includes a substrate, a floating gate, a control gate and an insulator. The insulator is disposed between the substrate and the control gate, and the floating gate is buried in the insulator. The insulator includes a tunnel oxide layer and an inter-poly dielectric layer. The tunnel oxide layer is disposed between the substrate and the floating gate, and the inter-poly dielectric layer is disposed between the floating gate and the control gate.
Employing the manufacturing process below 20 nm technology node, a floating-gate memory cell having the structure described above is produced. The floating-gate cell suffers a high inter-poly dielectric leakage current associated with the field crowding effects on the edges of the floating gate. A serious inter-poly dielectric leakage current results in a small program window and poor endurance, and reduces the data retention of the flash memory.